High radix switching devices, e.g., switches with many input ports and output ports, are desirable because they can be used to build large networks at relatively low cost. Due to the nature of switching devices, scaling (e.g., designing switches with an increased number of ports) is difficult to achieve. This is because the amount of overhead in scheduling the route of a packet through a data path increases quadratically as the number of inputs and outputs increases. Additionally, scaling may increase occurrences of contention among packets destined for the same output. Due to these limitations, packets arriving at an input of a switching device may be buffered as an arbiter selects which packets will move through the switching device in every switching cycle.
In an input-buffered switching fabric, incoming packets are stored in an input buffer to await arbitration (e.g., the process of being selected by the arbiter as candidates to move through the switch to an output port). A packet in an input buffered switching device may be prevented from participating in arbitration due to head of line blocking by any number of previously received packets that, despite being able to participate in arbitration, are not able to pass through the switch to their respective output port destinations. For example, packets may temporarily be prevented from passing to a hotspot output port (e.g., an output port that is currently congested due to a large number of packets being routed to it). Head of line blocking may reduce performance capabilities of a switching device.